2、指出下面VHDL程序中错误的地方并改正.LIBRARY IEEE;USE IEEE.STD_LOGIC_1164.ALL;ENTITY xor2 PORT(a,b:IN BIT;Y:OUT STD_LOGIC;);END;ARCHITECTURE xor2_2 of a ISBEGIN SIGNAL comb:STD_LOGIC_VECTOR(1 DOWNTO 0);PROCESSBEGINComb :=a & c;CASE c