vhdl求大神相助!\x05\x05\x05\x05\x05always @ (posedge left )\x05if(!RST_N)DATA1 <= 9'd0;\x05else\x05DATA1 <= flag 0:DATA1 + 1;\x05always @ (posedge right)\x05if(!RST_N)flag <= 0;\x05else flag = flag;
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